Coordinator: Prof. Antonio Vicino
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Systems On Chip For Smart Industry

 

Prof.
Nicola Petra
Università degli Studi Federico II di Napoli
Course Type
Type B
Calendar
June 28 h. 9:30/12:30 in distance mode - Microsoft Teams
June 29 h. 9:30/12:30 in distance mode - Microsoft Teams
June 30 h. 9:30/12:30 in distance mode - Microsoft Teams
July 1 h. 9:30/12:30 + 14:30/17:30 lab 126
July 2 h. 9:30/12:30 + 14:30/16:30 lab 126
Room
Program
Architectures and functionality of the components used in mixed hardware/software elaborating systems: microcontroller, memory, programmable logic, on-chip communication bus, interfaces and accelerators, I/O.
- Techniques and tools for the design of a System on Chip: high-level synthesis, hardware/software partitioning, system bus management, IPs integration
- Testing and Verification of a System on Chip: system level simulation, virtualization, run-time co-debug.
Practical skills in the design of System on Chip will be provided in lab/practical sessions. Students will use state of the art development tools to design a System on Chip.





 

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